We already know (from the previous lectures) how an instruction is formed and what the basic structure of an instruction is. Let’s go through few examples of it.
In our ISA design, the length of instruction is 16 bits. Such that: 4 bits for opcode, and 12 bits for operand(s).
In above operations I is for immediate, M is for memory, and R is for register. Let’s look at the registers and memory first before proceeding to the operations.
Assembly Code: LOADM R4 M6
Machine Code: 0001010000000110
In the above instruction operand value i.e. 87 from a memory (M6) copied to a register (R4).
Assembly Code: STORER R4 M6
Machine Code: 0011010000000110
In the above instruction operand value (67) is stored from a register (R4) to a Memory (M6) location.
Assembly Code: ADDR R2 R1
Machine Code: 0101 0010 0001 0000
Register R1 and R2 are added i.e. 23 and 79 and there result is then stored into R2 register.
LOADM R2 M69 ; load from memory M69 and store the value in register R2
ADDR R2 R1 ; add values of register R1 and R2
STORER R2 M2 ; store the value of register R2 to memory M2
Instruction Set
An instruction set is composed of two parts:- Opcode
- Operand (s)
Opcode
Opcode defines the number of operation supported by this instruction format and used for indexing that operation. For example: 0000 is the opcode for LOADI operation.Operand (s)
Operands can be a register address, memory address, and immediate value.In our ISA design, the length of instruction is 16 bits. Such that: 4 bits for opcode, and 12 bits for operand(s).
Opcode (4-bits) | Operands (12-bits) |
0 | 3 | 15 |
Operations
For this tutorial we will be focusing on the three basic operations, i.e. how to load, add, and store data in assembly language. Following are the few operations along with their opcodes:OPCODE | Operation |
---|---|
0000 | LOADI |
0001 | LOADM |
0010 | STOREI |
0011 | STORER |
0100 | ADDI |
0101 | ADDR |
0110 | SUBI |
… | … |
… | … |
1111 | … |
Registers
There are 16 registers hence 4 bits are required to address them. Registers are named as R0 to R15.Register Address | Register |
---|---|
0000 | R0 |
0001 | R1 |
0010 | R2 |
0011 | R3 |
0100 | R4 |
0101 | R5 |
0110 | R6 |
… | … |
… | … |
1111 | R15 |
Memory
There are 28 memory locations where data may reside. Hence 8 bits are required to address them. Memory locations are named as M0 to M255.Memory Address | Memory |
---|---|
00000000 | M0 |
00000001 | M1 |
00000010 | M2 |
00000011 | M3 |
00000100 | M4 |
00000101 | M5 |
00000110 | M6 |
… | … |
… | … |
11111111 | M255 |
LOADM Instruction
Definition
It loads an operand value from a memory location to a register.Bit allocation
LOADM
|
REGISTER ADDRESS
|
MEMORY ADDRESS
|
0 | 3 | 7 | 15 |
- 4 bits for Opcode
- 4 bits for Register address
- 8 bits for Memory address
Working
Consider an example:Assembly Code: LOADM R4 M6
Machine Code: 0001010000000110
LOADM
|
R4
|
M6
|
STORER Instruction
Define:
It stores an operand value from a register to a Memory location.Bit allocation:
STORER
|
REGISTER ADDRESS
|
MEMORY ADDRESS
|
0 | 3 | 7 | 15 |
- 4 bits for Opcode
- 4 bits for Register address
- 8 bits for Memory address
Working
Consider an example:Assembly Code: STORER R4 M6
Machine Code: 0011010000000110
STORER
|
R4
|
M6
|
0 | 3 | 7 | 15 |
ADDR Instruction
Define:
It adds register values and keeps the result in the destination register.Bit allocation:
ADDR
|
Reg. Address
|
Reg. Address
|
0 | 3 | 7 | 11 | 15 |
- 4 bits for Opcode
- 4 bits for each Register address
- 4 bits for Source
- 4 bits for Destination
Working
Consider an example:Assembly Code: ADDR R2 R1
Machine Code: 0101 0010 0001 0000
ADDR
|
R2
|
R1
|
0 | 3 | 7 | 11 | 15 |
Sample Example
LOADM R1 M25 ; load from memory M25 and store the value in register R1LOADM R2 M69 ; load from memory M69 and store the value in register R2
ADDR R2 R1 ; add values of register R1 and R2
STORER R2 M2 ; store the value of register R2 to memory M2
Execution of a Assembly Language Instruction
Our CPU will use three stages for executing a single assembly language instruction. These are:
Fetch:
CPU fetches the instruction from Instruction memory (Maintained in a 2D Array).
Decode:
Operation and operands are determined.
Execute:
Operation is performed on the operands.
To see these steps in practical follow the below program written in c language.
Program
A simulator for the discussed ISA design is written in C language. Click on the below link:
Write A Simulator For The Assembly Language ISA Design In C Language.
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